1/*
2 * Copyright (C) 2012-2019 Apple Inc. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
14 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
16 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
17 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
18 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
21 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
23 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#pragma once
27
28#include "LLIntCommon.h"
29#include <wtf/Assertions.h>
30#include <wtf/Gigacage.h>
31
32#if ENABLE(C_LOOP)
33#define OFFLINE_ASM_C_LOOP 1
34#define OFFLINE_ASM_X86 0
35#define OFFLINE_ASM_X86_WIN 0
36#define OFFLINE_ASM_ARMv7 0
37#define OFFLINE_ASM_ARM64 0
38#define OFFLINE_ASM_ARM64E 0
39#define OFFLINE_ASM_X86_64 0
40#define OFFLINE_ASM_X86_64_WIN 0
41#define OFFLINE_ASM_ARMv7k 0
42#define OFFLINE_ASM_ARMv7s 0
43#define OFFLINE_ASM_MIPS 0
44
45#else // ENABLE(C_LOOP)
46
47#define OFFLINE_ASM_C_LOOP 0
48
49#if CPU(X86) && !COMPILER(MSVC)
50#define OFFLINE_ASM_X86 1
51#else
52#define OFFLINE_ASM_X86 0
53#endif
54
55#if CPU(X86) && COMPILER(MSVC)
56#define OFFLINE_ASM_X86_WIN 1
57#else
58#define OFFLINE_ASM_X86_WIN 0
59#endif
60
61#ifdef __ARM_ARCH_7K__
62#define OFFLINE_ASM_ARMv7k 1
63#else
64#define OFFLINE_ASM_ARMv7k 0
65#endif
66
67#ifdef __ARM_ARCH_7S__
68#define OFFLINE_ASM_ARMv7s 1
69#else
70#define OFFLINE_ASM_ARMv7s 0
71#endif
72
73#if CPU(ARM_THUMB2)
74#define OFFLINE_ASM_ARMv7 1
75#else
76#define OFFLINE_ASM_ARMv7 0
77#endif
78
79#if CPU(X86_64) && !COMPILER(MSVC)
80#define OFFLINE_ASM_X86_64 1
81#else
82#define OFFLINE_ASM_X86_64 0
83#endif
84
85#if CPU(X86_64) && COMPILER(MSVC)
86#define OFFLINE_ASM_X86_64_WIN 1
87#else
88#define OFFLINE_ASM_X86_64_WIN 0
89#endif
90
91#if CPU(MIPS)
92#define OFFLINE_ASM_MIPS 1
93#else
94#define OFFLINE_ASM_MIPS 0
95#endif
96
97#if CPU(ARM64)
98#define OFFLINE_ASM_ARM64 1
99#else
100#define OFFLINE_ASM_ARM64 0
101#endif
102
103#if CPU(ARM64E)
104#define OFFLINE_ASM_ARM64E 1
105#undef OFFLINE_ASM_ARM64
106#define OFFLINE_ASM_ARM64 0 // Pretend that ARM64 and ARM64E are mutually exclusive to please the offlineasm.
107#else
108#define OFFLINE_ASM_ARM64E 0
109#endif
110
111#if CPU(MIPS)
112#ifdef WTF_MIPS_PIC
113#define S(x) #x
114#define SX(x) S(x)
115#define OFFLINE_ASM_CPLOAD(reg) \
116 ".set noreorder\n" \
117 ".cpload " SX(reg) "\n" \
118 ".set reorder\n"
119#else
120#define OFFLINE_ASM_CPLOAD(reg)
121#endif
122#endif
123
124#endif // ENABLE(C_LOOP)
125
126#if USE(JSVALUE64)
127#define OFFLINE_ASM_JSVALUE64 1
128#else
129#define OFFLINE_ASM_JSVALUE64 0
130#endif
131
132#if CPU(ADDRESS64)
133#define OFFLINE_ASM_ADDRESS64 1
134#else
135#define OFFLINE_ASM_ADDRESS64 0
136#endif
137
138#if !ASSERT_DISABLED
139#define OFFLINE_ASM_ASSERT_ENABLED 1
140#else
141#define OFFLINE_ASM_ASSERT_ENABLED 0
142#endif
143
144#if LLINT_TRACING
145#define OFFLINE_ASM_TRACING 1
146#else
147#define OFFLINE_ASM_TRACING 0
148#endif
149
150#define OFFLINE_ASM_GIGACAGE_ENABLED GIGACAGE_ENABLED
151