| 1 | /* udis86 - libudis86/syn-intel.c |
| 2 | * |
| 3 | * Copyright (c) 2002-2013 Vivek Thampi |
| 4 | * All rights reserved. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without modification, |
| 7 | * are permitted provided that the following conditions are met: |
| 8 | * |
| 9 | * * Redistributions of source code must retain the above copyright notice, |
| 10 | * this list of conditions and the following disclaimer. |
| 11 | * * Redistributions in binary form must reproduce the above copyright notice, |
| 12 | * this list of conditions and the following disclaimer in the documentation |
| 13 | * and/or other materials provided with the distribution. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 16 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 17 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 18 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR |
| 19 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 20 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 21 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 22 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 24 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 25 | */ |
| 26 | |
| 27 | #include "config.h" |
| 28 | |
| 29 | #if USE(UDIS86) |
| 30 | |
| 31 | #include "udis86_types.h" |
| 32 | #include "udis86_extern.h" |
| 33 | #include "udis86_decode.h" |
| 34 | #include "udis86_itab.h" |
| 35 | #include "udis86_syn.h" |
| 36 | #include "udis86_udint.h" |
| 37 | |
| 38 | /* ----------------------------------------------------------------------------- |
| 39 | * opr_cast() - Prints an operand cast. |
| 40 | * ----------------------------------------------------------------------------- |
| 41 | */ |
| 42 | static void |
| 43 | opr_cast(struct ud* u, struct ud_operand* op) |
| 44 | { |
| 45 | if (u->br_far) { |
| 46 | ud_asmprintf(u, "far " ); |
| 47 | } |
| 48 | switch(op->size) { |
| 49 | case 8: ud_asmprintf(u, "byte " ); break; |
| 50 | case 16: ud_asmprintf(u, "word " ); break; |
| 51 | case 32: ud_asmprintf(u, "dword " ); break; |
| 52 | case 64: ud_asmprintf(u, "qword " ); break; |
| 53 | case 80: ud_asmprintf(u, "tword " ); break; |
| 54 | case 128: ud_asmprintf(u, "oword " ); break; |
| 55 | case 256: ud_asmprintf(u, "yword " ); break; |
| 56 | default: break; |
| 57 | } |
| 58 | } |
| 59 | |
| 60 | /* ----------------------------------------------------------------------------- |
| 61 | * gen_operand() - Generates assembly output for each operand. |
| 62 | * ----------------------------------------------------------------------------- |
| 63 | */ |
| 64 | static void gen_operand(struct ud* u, struct ud_operand* op, int syn_cast) |
| 65 | { |
| 66 | switch(op->type) { |
| 67 | case UD_OP_REG: |
| 68 | ud_asmprintf(u, "%s" , ud_reg_tab[op->base - UD_R_AL]); |
| 69 | break; |
| 70 | |
| 71 | case UD_OP_MEM: |
| 72 | if (syn_cast) { |
| 73 | opr_cast(u, op); |
| 74 | } |
| 75 | ud_asmprintf(u, "[" ); |
| 76 | if (u->pfx_seg) { |
| 77 | ud_asmprintf(u, "%s:" , ud_reg_tab[u->pfx_seg - UD_R_AL]); |
| 78 | } |
| 79 | if (op->base) { |
| 80 | ud_asmprintf(u, "%s" , ud_reg_tab[op->base - UD_R_AL]); |
| 81 | } |
| 82 | if (op->index) { |
| 83 | ud_asmprintf(u, "%s%s" , op->base != UD_NONE? "+" : "" , |
| 84 | ud_reg_tab[op->index - UD_R_AL]); |
| 85 | if (op->scale) { |
| 86 | ud_asmprintf(u, "*%d" , op->scale); |
| 87 | } |
| 88 | } |
| 89 | if (op->offset != 0) { |
| 90 | ud_syn_print_mem_disp(u, op, (op->base != UD_NONE || |
| 91 | op->index != UD_NONE) ? 1 : 0); |
| 92 | } |
| 93 | ud_asmprintf(u, "]" ); |
| 94 | break; |
| 95 | |
| 96 | case UD_OP_IMM: |
| 97 | ud_syn_print_imm(u, op); |
| 98 | break; |
| 99 | |
| 100 | |
| 101 | case UD_OP_JIMM: |
| 102 | ud_syn_print_addr(u, ud_syn_rel_target(u, op)); |
| 103 | break; |
| 104 | |
| 105 | case UD_OP_PTR: |
| 106 | switch (op->size) { |
| 107 | case 32: |
| 108 | ud_asmprintf(u, "word 0x%x:0x%x" , op->lval.ptr.seg, |
| 109 | op->lval.ptr.off & 0xFFFF); |
| 110 | break; |
| 111 | case 48: |
| 112 | ud_asmprintf(u, "dword 0x%x:0x%x" , op->lval.ptr.seg, |
| 113 | op->lval.ptr.off); |
| 114 | break; |
| 115 | } |
| 116 | break; |
| 117 | |
| 118 | case UD_OP_CONST: |
| 119 | if (syn_cast) opr_cast(u, op); |
| 120 | ud_asmprintf(u, "%d" , op->lval.udword); |
| 121 | break; |
| 122 | |
| 123 | default: return; |
| 124 | } |
| 125 | } |
| 126 | |
| 127 | /* ============================================================================= |
| 128 | * translates to intel syntax |
| 129 | * ============================================================================= |
| 130 | */ |
| 131 | extern void |
| 132 | ud_translate_intel(struct ud* u) |
| 133 | { |
| 134 | /* check if P_OSO prefix is used */ |
| 135 | if (!P_OSO(u->itab_entry->prefix) && u->pfx_opr) { |
| 136 | switch (u->dis_mode) { |
| 137 | case 16: ud_asmprintf(u, "o32 " ); break; |
| 138 | case 32: |
| 139 | case 64: ud_asmprintf(u, "o16 " ); break; |
| 140 | } |
| 141 | } |
| 142 | |
| 143 | /* check if P_ASO prefix was used */ |
| 144 | if (!P_ASO(u->itab_entry->prefix) && u->pfx_adr) { |
| 145 | switch (u->dis_mode) { |
| 146 | case 16: ud_asmprintf(u, "a32 " ); break; |
| 147 | case 32: ud_asmprintf(u, "a16 " ); break; |
| 148 | case 64: ud_asmprintf(u, "a32 " ); break; |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | if (u->pfx_seg && |
| 153 | u->operand[0].type != UD_OP_MEM && |
| 154 | u->operand[1].type != UD_OP_MEM ) { |
| 155 | ud_asmprintf(u, "%s " , ud_reg_tab[u->pfx_seg - UD_R_AL]); |
| 156 | } |
| 157 | |
| 158 | if (u->pfx_lock) { |
| 159 | ud_asmprintf(u, "lock " ); |
| 160 | } |
| 161 | if (u->pfx_rep) { |
| 162 | ud_asmprintf(u, "rep " ); |
| 163 | } else if (u->pfx_repe) { |
| 164 | ud_asmprintf(u, "repe " ); |
| 165 | } else if (u->pfx_repne) { |
| 166 | ud_asmprintf(u, "repne " ); |
| 167 | } |
| 168 | |
| 169 | /* print the instruction mnemonic */ |
| 170 | ud_asmprintf(u, "%s" , ud_lookup_mnemonic(u->mnemonic)); |
| 171 | |
| 172 | if (u->operand[0].type != UD_NONE) { |
| 173 | int cast = 0; |
| 174 | ud_asmprintf(u, " " ); |
| 175 | if (u->operand[0].type == UD_OP_MEM) { |
| 176 | if (u->operand[1].type == UD_OP_IMM || |
| 177 | u->operand[1].type == UD_OP_CONST || |
| 178 | u->operand[1].type == UD_NONE || |
| 179 | (u->operand[0].size != u->operand[1].size)) { |
| 180 | cast = 1; |
| 181 | } else if (u->operand[1].type == UD_OP_REG && |
| 182 | u->operand[1].base == UD_R_CL) { |
| 183 | switch (u->mnemonic) { |
| 184 | case UD_Ircl: |
| 185 | case UD_Irol: |
| 186 | case UD_Iror: |
| 187 | case UD_Ircr: |
| 188 | case UD_Ishl: |
| 189 | case UD_Ishr: |
| 190 | case UD_Isar: |
| 191 | cast = 1; |
| 192 | break; |
| 193 | default: break; |
| 194 | } |
| 195 | } |
| 196 | } |
| 197 | gen_operand(u, &u->operand[0], cast); |
| 198 | } |
| 199 | |
| 200 | if (u->operand[1].type != UD_NONE) { |
| 201 | int cast = 0; |
| 202 | ud_asmprintf(u, ", " ); |
| 203 | if (u->operand[1].type == UD_OP_MEM && |
| 204 | u->operand[0].size != u->operand[1].size && |
| 205 | !ud_opr_is_sreg(&u->operand[0])) { |
| 206 | cast = 1; |
| 207 | } |
| 208 | gen_operand(u, &u->operand[1], cast); |
| 209 | } |
| 210 | |
| 211 | if (u->operand[2].type != UD_NONE) { |
| 212 | int cast = 0; |
| 213 | ud_asmprintf(u, ", " ); |
| 214 | if (u->operand[2].type == UD_OP_MEM && |
| 215 | u->operand[2].size != u->operand[1].size) { |
| 216 | cast = 1; |
| 217 | } |
| 218 | gen_operand(u, &u->operand[2], cast); |
| 219 | } |
| 220 | |
| 221 | if (u->operand[3].type != UD_NONE) { |
| 222 | ud_asmprintf(u, ", " ); |
| 223 | gen_operand(u, &u->operand[3], 0); |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | #endif // USE(UDIS86) |
| 228 | |
| 229 | /* |
| 230 | vim: set ts=2 sw=2 expandtab |
| 231 | */ |
| 232 | |